Output signal processing circuit for ccd register

Abstract

A CCD register, for example a horizontal output register of a CCD imager, includes an output precharge circuit with a capacitance. The voltage across the capacitance is supplied to an output terminal of the CCD register and has first, second and third durations repeatedly. The first duration is a precharge, the second duration is a reference duration, and the third duration is a signal. An output signal processing circuit provided for the CCD register includes a clamp circuit for clamping the output signal at the output terminal of the CCD register in such a manner that the voltage of the reference duration becomes a stable clamp voltage; a clip circuit for clipping the output signal of the clamp circuit in such that the voltage of the precharge duration is clipped to a clip level; and a low-pass filter supplied with the output of the clip circuit for generating a transferred signal.