The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 1989

Filed:

Aug. 17, 1987
Applicant:
Inventors:

Josef Winnerl, Landshut, DE;

Dezso Takacs, Munich, DE;

Assignee:

Siemens Aktiengesellschaft, Berlin and Munich, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ;
U.S. Cl.
CPC ...
36518909 ; 365226 ; 365190 ; 3072961 ;
Abstract

An integrated circuit executed in complementary circuit technology, has a substrate bias generator (16) which connects the substrate (1) to a substrate bias. A well (2) of opposite conductivity is inserted into the substrate (1), and FETs with complementary channels are inserted into the substrate (1) and into the well (2), respectively. The source regions (3) of the FET's of first conductivity lie at ground potential. In order to avoid latch-up effects, the output (17) of the substrate bias generator (16) is connected via an electronic switch (S1) to a circuit point (8) lying at ground potential, the switch being driven via a time-delay circuit (24) charged with the supply voltage so that it opens with a prescribed time-delay after the supply voltage is applied.


Find Patent Forward Citations

Loading…