The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 1989

Filed:

Apr. 27, 1988
Applicant:
Inventors:

Luigi Licciardi, Almese, IT;

Alessandro Torielli, Torino, IT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364784 ; 364768 ;
Abstract

The arithmetic-logic unit has elementary cells performing logic addition, one for each pair of operand bits, which are particularly optimized as far as carry propogation speed is concerned and are controlled by an auxiliary fast logic allowing their performance to be extended to the other operations. The unit also has a control signal generating circuit, subdivided into a first part (DEC1), near the elementary cell of least significant position, which generates an operation selecting signal for all the cells, and into a second part (DEC2), near the elementary cell of most significant position, which generates control signals for the auxiliary logic of each elementary cell.


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