Digital circuit system for television receivers with cathode ray picture

Abstract

A deflection processor generates deflection signals such that the video information of the received signal is visible on the picture tube screen during all movements of the cathode ray beam. The video signal, after being digitized by means of a clock signal, is written into a random-access memory and is read therefrom in such a way that the individual pixels occupy the correct positions on the screen. This is done under control of a memory controller. The digital signals of the memory are applied to a tube-error-compensating stage and to the picture tube via digital-to-analog converters. This arrangement eliminates the rigid dependence on sawtooth deflection signals and permits the waveforms of the deflection signals to be freely selected according to requirements.