The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 1989
Filed:
Apr. 05, 1988
Marcellinus J Pelgrom, Eindhoven, NL;
Adrianus C Duinmaijer, Eindhoven, NL;
U.S. Philips Corporation, New York, NY (US);
Abstract
A digital-to-analog converter for converting a digital signal having a word length n into an analog signal. The converter includes at least two switched capacitor integrators (1, 2) arranged in series and a control unit (18) for applying control signals to the integrators which perform an integration step under the influence of the control signal. Each integrator is provided with a capacitor network (11, 12) having at least two capacitors (27.1, 27.2, . . . ; 28.1, 28.2, . . . ) coupled between the input (13; 4) of the integrator and the inverting input (-) of an associated amplifier stage (5; 6). A capacitor (9; 10) is coupled between the inverting input (-) and the output (7; 8) of this amplifier stage. The control unit is adapted to apply, in this order, a first control signal to the first integrator (1), a second control signal to the second integrator (2), a third control signal to the first integrator and a fourth control signal to the second integrator. The first integrator couples a total capacitance of M1.Cref1 and M3.Cref1 during a given time interval to the inverting input of the amplifier stage (5) under the influence of the first and the third control signal, respectively. The second integrator (2) couples a total capacitance of M2.Cref2 and M4.Cref2 during a given time interval to the inverting output of the amplifier stage (6) under the influence of the second and the fourth control signal, respectively. For converting an arbitrary n-bit digital signal, M2+M4 is equal to a constant (k) which is preferably equal to 2.sup.p in which p.ltoreq.n an offset voltage which is independent of the value of the digital signal to be converted is produced at the output (8) of the converter.