The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 1989
Filed:
Jul. 07, 1988
Applicant:
Inventors:
Roger L Hollstein, Phoenix, AZ (US);
M Ngheim Phan, Mesa, AZ (US);
Assignee:
Motorola Inc., Schaumburg, IL (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
307455 ; 307475 ; 307362 ;
Abstract
An ECL logic gate includes an input stage, an output stage, and a multifunction current mirror circuit. The input stage includes a plurality of input transistors, a reference transistor, and an output which indicates the relative conductivities of said reference transistor as compared to one or more of the input transistors. This output is coupled to the output stage. A current mirror circuit having first and second current paths is provided in which the input stage is coupled in series with the first current path, and the output stage is coupled in series with the second current path.