Microcomputer with a multi-channel serial port having a single port

Abstract

A microcomputer having a dual-channel serial port is disclosed, where both channels of the serial port have the same addressable location. On the transmit side of the serial port, two data words are sequentially written to a two stage first-in first-out memory from the data bus of the microcomputer, when the serial port is addressed. At such time as a frame of data is to be transmitted, the framing signal causes the contents of the two stages of the first-in first-out memory to be loaded into separate transmit shift registers, for serial transmission from the pair of serial output terminals. On the receive side of the serial port, a pair of shift registers each receive serial data at the serial input terminals; at the end of the data frame, the contents of the shift registers are loaded into intermediate receive registers. The contents of the intermediate receive registers are multiplexed onto the data bus, responsive to a read instruction addressing the serial port. Encoding and decoding hardware is provided which allows the data to be selectively companded according to the micro-255 law or to the A law, both prior to transmission and after receipt.