The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 05, 1989
Filed:
Jan. 25, 1988
Applicant:
Inventors:
Assignee:
Hitachi, Ltd., Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
357 64 ; 357 63 ; 357 236 ;
Abstract
A MOS memory is formed in a semiconductor bulk, whereas a barrier semiconductor layer is disposed at the boundary between a MOS memory portion and the semiconductor bulk in order to reduce the effect of undesirable carriers excited by .alpha.-particles. The barrier semiconductor layer is designed to permit operation of the memory at low temperature while reducing the incidence of soft errors due to .alpha.-particles.
Aoki, Masaaki. (1989). Semiconductor device (U.S. Patent No. 4864382). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4864382
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile