The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 22, 1989
Filed:
Dec. 08, 1987
Harufusa Kondou, Hyogo, JP;
Hideki Ando, Hyogo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
An arithmetic unit having true and false deciding circuits (21 to 24) for receiving a first input signal A and a second input signal B to output the second input signal or complement of the same in response to the sign (most significant bit value) of the second input signal. The arithmetic unit further includes an adder (31 to 34) for receiving the first input signal A and output (M) from the true and false deciding circuits to output either A+M or A+M+1 in response to the sign (most significant bit value) of the second input signal B and an AND gate (50) for receiving the most significant bit F.sub.4 of output F from the adder and the most significant bit value B.sub.4 of the second input signal B. The arithmetic unit thus outputs the alternate mark inversion (AMI) code of the input signal B having the output of the AND gate (50) as a high order bit and the most significant bit F.sub.4 of the output F of the adder as a low order bit, with a threshold value of the input signal A.