The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 15, 1989
Filed:
Dec. 19, 1986
Roland H Pang, Plano, TX (US);
Edison H Chiu, Richardson, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A reset circuit for a CMOS memory array is disclosed wherein the voltage supply for the standard six transistor memory cell is replaced by a pair of parallel connected transistors disposed between a fixed voltage source and the memory cell. The transistors are controlled by the reset signal and are complementary in that one is n-channel and the other is p-channel. The n-channel transistor is sized to prevent excess current flow to the memory cells to prevent an excessive charge build up therein for a logical '1' representation. In addition, the n-channel transistor provides a Vtn drop thereacross to prevent current flow in the memory cells during reset.