The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 15, 1989
Filed:
Sep. 27, 1985
Kazuyuki Sato, Tokyo, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
In a monolithic semi-custom LSI, different types of standard LSI logic sections, each having a predetermined logic configuration and wiring pattern, and each serving as an independent LSI chip; glue circuits such as an SSI and an MSI which have design standards suitable for the same process conditions as those of the standard LSI logic sections, and which constitute a peripheral circuit section of the standard LSI logic sections; a mask pattern section having a wiring region for arbitrarily connecting terminals of the standard LSI logic sections and the peripheral circuit section, and a bonding pad section formed to surround the standard LSI logic sections and the peripheral circuit section to connect them to lead wires, are arranged to minimize the chip size. These constituting elements constitute common hardware as a master. The elements are connected through a single- or multi-layer wiring pattern.