The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 1989

Filed:

Sep. 25, 1986
Applicant:
Inventor:

Serge Fournier, Montreal, Quebec, CA;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364491 ; 364489 ;
Abstract

In a routing method for efficiently routing the interconnections of a printed circuit board, the list of interconnections to be made is ordered to provide a work order for deriving routes. The circuit board is notionally divided into a grid of addressable cells. Then grid lines are considered in turn. A particular grid line may have a certain number (x) of cells that are full and so cannot be used for routing and other cells which are empty and so available for routing (capacity). If all interconnections to be made were made by direct spans then that particular grid line would have grid crossings occupying a certain number (y) of cells (occupancy). A MAOMIC (maximum occupancy-minimum capacity) product of that grid line is derived. When assigning routes, the routes of those interconnections which, if directly made, would cross the grid line of highest MAOMIC product are assigned first.


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