The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 15, 1989
Filed:
Sep. 14, 1988
Lawrence F Wagner, Berkeley, CA (US);
Wayne P Burleson, Palo Alto, CA (US);
John P Guadagna, Morgan Hill, CA (US);
VLSI Technology, Inc., San Jose, CA (US);
Abstract
A comparator array logic (CAL) circuit has a plurality of interconnected comparators arranged in an array. Each of the comparators stores a digital value. The CAL circuit stores all of the digital values in a monotonically increasing or decreasing order. Each of the comparators receives the input data signal and compares the input data signal to the digital value stored in the comparator. A comparison signal is generated in response to the comparison. The comparison signal from each comparator is received by an end cell which also receives the comparison signal from the immediately adjacent comparator. The end cell generates an output signal. An end cell is associated with each comparator. The plurality of output signals from the end cells represent the location of the comparator which borders the value of the input data signal.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile