The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 15, 1989
Filed:
Apr. 27, 1987
William H Herndon, Sunnyvale, CA (US);
Fairchild Semiconductor Corporation, Cupertino, CA (US);
Abstract
A decoder incorporates the advantageous features of both bipolar and BICMOS decoding circuits through the use of BIPMOS technology. PMOS gating transistors are used to control the operation of bipolar output transistors. It is only necessary to operate the PMOS transistors with relatively small drain voltage variations, since the bipolar transistors are sensitive to such small variations. Further, transient signals are referenced to one power supply voltage only, to thereby make the logic swing and performance characteristics of the decoder independent of power supply voltage variations. Therefore it becomes possible to use PMOS transistors that have smaller voltage requirements than conventional CMOS circuits.