The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 1989

Filed:

Sep. 04, 1987
Applicant:
Inventors:

Janet E Wedgwood, Roslyn Heights, NY (US);

Dennis W Berde, Melville, NY (US);

Steven J Bocskor, Ronkonkoma, NY (US);

George E Cotter, Commack, NY (US);

Assignee:

Grumman Aerospace Corporation, Bethpage, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04B / ;
U.S. Cl.
CPC ...
455 50 ; 375104 ; 455223 ;
Abstract

An electronic blanking system having a plurality of inputs from a number of radio frequency transmitters and a plurality of outputs for supplying blanking pulses to receivers which are in proximity to the transmitters includes input circuitry for processing input pulses from the inputs to produce processed input signals. Timers alter the timing of the processed input signals as required to produce the needed blanking pulses. Matrix means are provided for routing each blanking pulse to the outputs. A processor controls each matrix to determine the routing. Output drivers supply the blanking pulses, at predetermined voltage levels, to the outputs. The processor also controls the timers to determine the manner in which the timing is altered. The timers includes at least one of a delay for delaying the processed input signals, a stretching circuit for increasing the length of the processed input signals, and a truncator for truncating the length of the processed input signals. Each matrix includes a product generator for determining logical products of at least two processed input signals, and a sum generator for determining the logical sum of the logical products. An externally programmable memory has a first portion for storing instructions for the processor and a second portion for storing data to determine at least one of the operations of the timers and each matrix. At least the second portion of the memory is an electronically erasable read only memory.


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