The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 01, 1989
Filed:
Mar. 08, 1988
Edwin W Resler, San Jose, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
An emulator probe assembly for testing circuit boards which control programmable logic devices includes a header assembly, a universal pod, and an extender. The header assembly includes a socket, a plug, and a flexible cable. The header socket is matched in size to the socket of the circuit board so that during testing the programmable logic device can be inserted into the header socket and the header plug into the circuit board. Some pins in the header plug are connected directly to crresponding pins in the header socket. However other pins in the header plug are connected through lines in the flexible cable to contacts in a pod plug at the opposite end of the flexible cable. Corresponding pins in the header socket are also connected through the flexible cable to contacts in the pod plug. The pod plug is received by the universal pod which has electronics for controlling or receiving signals from the programmable logic device or the circuit board. An emulator can control this universal pod to in turn control the programmable logic device and otherwise assist a designer in testing the circuit board. The extender includes test pins for applying test signals to or monitoring signals for individual pins of the programmable logic device. The extender includes removable shunts or jumpers for disconnecting certain pins in the programmable logic device from corresponding pins in the circuit board.