The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 18, 1989
Filed:
Oct. 27, 1987
Yuichi Miyazawa, Tokyo, JP;
Kasuhiki Kaisha Toshiba, Kawasaki, JP;
Abstract
A semiconductor memory having latch circuits, each of which is coupled to receive the potential of a bit line and which can operate, in response to a control signal, in either a through mode or a latch mode. In the through mode, the latch circuit outputs the potential of the bit line. In the latch mode, it latches this potential and then outputs it. The memory further comprises a dummy bit line and FETs. These FETs are provided at the intersections of the dummy bit line and all word lines of the memory. Hence, the dummy bit line is discharged whenever a word line has been selected. The latch circuits, which are provided in the output section of the memory, are set to the through mode when the dummy bit line is discharged to a predetermined potential.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile