The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 1989

Filed:

Dec. 22, 1986
Applicant:
Inventors:

Edward D Nonnweiler, Milwaukee, WI (US);

Richard B Leavell, Pembrooke, FL (US);

Assignee:

General Electric Company, New York, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
36441313 ; 128277 ;
Abstract

An exposure control module for an X-ray imaging system includes a timing and sequence controller communicating with external elements of the system on a parallel data bus. The timing and sequence controller employs a plurality of stored recipes for advancing the system through a selected mode of operation. Changes in certain of the external signals on the parallel data bus may be recognized by an interrupt handler to transfer the attention of the system. The amount of hardware required for recognition of a significant change is reduced by converting a sample of the bus data into a plurality of sets of parallel data, and storing each set in separate multiplexers. A further plurality of sets of data from a preceding sample are applied to a corresponding further set of multiplexers. The serial data in corresponding pairs of present-status and previous-status multiplexers is read out in parallel to a logic array. The logic array also receives mask signals effective to enable or inhibit selectively the recognition of positive-going and negative-going changes in the data from sample to sample. When an enabled change is detected, an interrupt is generated. The actual bus signal conditions are compared with desired bus signal conditions. Once coincidence between the actual and desired conditions is achieved, a recipe process is executed.


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