The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 1989

Filed:

Jan. 14, 1988
Applicant:
Inventors:

Satoshi Tanaka, Kokubunji, JP;

Hirotoshi Tanaka, Yamanashi, JP;

Taizo Kinoshita, Kokubunji, JP;

Nobuo Kotera, Kokubunji, JP;

Minoru Nagata, Kodaira, JP;

Kiichi Yamashita, Kanagawa, JP;

Tomoyuki Watanabe, Hachioji, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323313 ;
Abstract

A constant voltage circuit according to this invention comprises first means attenuating or dividing fluctuating voltage and an amplifying FET, to the gate of which the output attenuated or divided by the first means is applied and whose drain is connected with the fluctuating voltage through load means. The attenuation ratio or division ratio of the first means, the mutual conductance of the amplifying FET and the impedance of the load means are so set that the voltage drop across the load means cancels the fluctuating amount of the fluctuating voltage. Consequently an output voltage, which is maintained substantially constant, is obtained at the drain of the amplifying FET, independently of fluctuations in the fluctuating voltage, and thus a constant voltage circuit can be obtained. A constant current circuit according to this invention utilizes the constant voltage circuit described above. The output voltage of the constant voltage circuit is supplied to the gate of the constant current FET. Consequently a current, which is maintained substantially constant, flows through the drain-source path of this constant current FET and thus a constant current circuit can be obtained.


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