The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 1989
Filed:
Oct. 16, 1987
Allan R Kent, Arlington, MA (US);
Robert E Stewart, Stow, MA (US);
Harold A Read, Burlin, MA (US);
Barry A Henry, Penacook, NH (US);
Charles E Kaczor, Dudley, MA (US);
Milton V Mills, Boston, MA (US);
Ronald C Carn, Millis, MA (US);
Donald R Metz, Ashburnham, MA (US);
Digital Equipment Corporation, Maynard, MA (US);
Abstract
A computer interconnect coupler has a set of junctors which are assigned to channel transmitters and channel receivers for the routing of messages from the channel receivers which are addressed to the channel transmitters. When a message is received by a channel receiver, the channel receiver stores the beginning portion of the message in a first-in-first-out buffer, and sends a route message request to central switch logic. If the destination transmitter or receiver is busy, the central logic places the message request on a destination queue and returns a signal to the requesting source transmitter to turn on a flow control signal which is transmitted back to the data processing device having originated the message. Any message addressed to this data processing device, however, is inserted into the flow control carrier with pauses both before and after the message, and provisions are also made to allow the data processing device to return an acknowledgment code responsive to the imcoming message. To permit incremental expansion of the coupler to accommodate an increased number of channels, additional channel interface boards may be added and a hierarchical rotating priority scheme enables the additional channels to have equal priority with the previously existing channels without requiring reprogramming. Moreover, the processing and queueing of routing requests is made more effective by grouping the requests into different priority levels and using separate but duplicate arbitration logic to resolve simultaneous requests within the same priority group.