The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 1989
Filed:
Oct. 02, 1987
Tho T Vu, Fridley, MN (US);
Andrzej Peczalski, Brooklyn Park, MN (US);
James D Joseph, Oakdale, MN (US);
Honeywell Inc., Minneapolis, MN (US);
Abstract
A GaAs SCFL RAM having a unique three-voltage-level write circuit, direct-read circuitry with only one gate delay, diode-coupled FET logic cells, and peripheral circuitry with SCFL gates. The memory module architecture and plan of the RAM allow for several design options which may include 1K.times.16 and 16K.times.1 memory configurations. The RAM incorporates strobe circuitry for powering down selected memory modules, without loss of data, thus reducing power dissipation. The SCFL circuitry of the RAM functions with closely matched complementary signals for fast switching with minimum current spiking. The RAM has a wide range of threshold voltage tolerance, excellent noise margin, and a very high level of radioactive radiation hardness.