The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 1989
Filed:
Sep. 15, 1986
Ian M Baker, Romsey, Hants, GB;
Raymond E King, Chandlersford, GB;
U.S. Philips Corp., New York, NY (US);
Abstract
In an imaging device, photocurrent generated by detector elements (1), e.g. cadmium mercury telluride photodiodes, may be integrated in resettable capacitors (2), and an output signal (S) may be derived by reading the potential of the capacitor (2) at the end of its integration period, e.g. using a source-follower MOST (3). In accordance with the invention first and second capacitors (2a and 2b) are switchably coupled in alternate parallel arms between each detector element (1) and the voltage-reading means (3), by means of an arrangement of input gates (8a and 8b) and output gates (9a and 9b). Since one of the first and second capacitors (2a or 2b) can be coupled to the detector element (1) while the other (2b or 2a) is coupled to the voltage-reading means (3), each detector element (1) can be switched from one to the other so as to be operated the whole time for photodetection without its signal being lost (i.e. not integrated) when reading the previous output signal from that detector element (1). This is particularly useful for coupling a row of storage capacitors via a 2-d switching array to a 2-d array of infrared detector elements (1). A similar arrangement of alternately-switchable first and second capacitors (2a and 2b) may be used for visible light imaging, and a modified arrangement may used with a CCD signal processing circuit.