The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 06, 1989
Filed:
Nov. 30, 1987
Katsumi Dosaka, Hyogo, JP;
Masaki Kumanoya, Hyogo, JP;
Hideshi Miyatake, Hyogo, JP;
Hideto Hidaka, Hyogo, JP;
Yasuhiro Konishi, Hyogo, JP;
Hiroyuki Yamasaki, Hyogo, JP;
Yuto Ikeda, Hyogo, JP;
Kazuhiro Tsukamoto, Hyogo, JP;
Masaki Shimoda, Hyogo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
A memory cell array is divided into four blocks #1 to #4. The blocks #1 and #3 are operated when a row address signal RA.sub.8 equals '0'. The blocks #2 and #4 are operated when the row address signal RA.sub.8 equals '1'. A spare row sub-decoder is provided in each of the blocks. Spare row sub-decoders in the blocks #1 and #2 are connected to a spare row main decoder through a single spare decoder selecting line. The spare row sub-decoders in the blocks #2 and #4 are connected to the other spare row main decoder through another spare decoder selecting line. The spare main decoders are responsive to the row address signal RA.sub.8 and row address signals RA.sub.2, RA.sub.2, . . . , RA.sub.7, RA.sub.7 for operating a spare row sub-decoder in a block which is in the operating state.