The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 1989

Filed:

Nov. 17, 1987
Applicant:
Inventor:

David S Rosky, Encinitas, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307475 ; 307446 ; 307454 ; 307482 ; 307246 ;
Abstract

A method and apparatus for converting input signals at one predetermined logic level to output signals at corresponding different logic levels includes differential amplification of input signals with a first output of a differential amplifier connected for establishing a voltage level between voltage limits V.sub.cc and V.sub.ee at the output of an output driver in response to variations in amplifier output. A pull-down transistor has a collector connected to the output driver output, an emitter connected to the V.sub.ee voltage source, and a base capacitively coupled to the second amplifier output. In further aspects of the invention, a voltage clamp embracing a transistor with a base connected to receive a predetermined control voltage has an emitter connected to the pull-down transistor base and a collector connected to the V.sub.cc voltage source.


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