The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 1989

Filed:

Mar. 31, 1987
Applicant:
Inventors:

Takashi Oyagi, Tokyo, JP;

Shigeo Yoshizawa, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L / ;
U.S. Cl.
CPC ...
375119 ; 328 73 ;
Abstract

A synchronizing circuit for synchronizing the phase of a clock signal to the phase of a received digital signal includes a phase monitoring circuit for detecting, during each bit period of the digital signal, the phase advance of delay of the clock signal relative to the digital signals. A phase signal is outputting which is indicative of the phase advance or delay of the clock signal. A phase control circuit responds to the phase signal to either advance, delay or leave unchanged the phase of the clock signal with respect to the received digital signal. An inhibiting circuit coupled to the phase control circuit operates to prevent the phase control circuit from reversing the sense of the phase adjustment from advance to delay or from delay to advance in consecutive bit positions, interposing instead one bit position during which the phase of the clock signal is left unadjusted.


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