The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 1989

Filed:

May. 05, 1988
Applicant:
Inventor:

Bernard D Miller, San Jose, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
357 2313 ; 361 91 ;
Abstract

A circuit and structure intended for use in CMOS IC designs acts to protect signal lines against ESD. An array of three transistors is connected so that the voltage pulse that appears on the signal line as a result of ESD, forces at least one transistor into conduction. The circuit responds equally to positive and negative pulses and is, therefore, symmetrical, and independent of bias or supply potentials. In the absence of an ESD pulse the circuit draws a very low leakage current and, therefore, has very little effect upon normal IC operation.


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