The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 25, 1989
Filed:
Dec. 04, 1987
Steven K Barton, Peyton, CO (US);
Ford MicroElectronics, Colorado Springs, CO (US);
Abstract
An output pad driver circuit for an integrated circuit chip architecture incorporates a controllably switched current mirror circuit in the circuit path between an output pad driver input terminal to which a digital signal produced by the signal processing circuitry of the chip is applied and an output terminal from which an output signal produced by the output pad is produced. The controllably switched current mirror circuit is coupled to a reference current terminal to which a source of reference current is applied. Coupled between the input terminal and the current mirror circuit is a first switching transistor which controllably causes the controllably switched current mirror circuit to apply a controlled current to the output terminal in response to a prescribed change in the logic level of an input signal that is applied to the input terminal. A second switching transistor is coupled in a feedback path between the output terminal and the current mirror circuit, and causes the current mirror circuit to terminate the supply of controlled current to the output terminal in response to the voltage level at said output terminal reaching a prescribed threshold. A third switching transistor is coupled between the input terminal and the current mirror circuit, so as to prevent the current mirror from applying a controlled current to the output terminal until the state of the input signal undergoes the prescribed logic level change.