The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 1989

Filed:

Jul. 17, 1987
Applicant:
Inventors:

Hiroyasu Kishi, Gumma, JP;

Hiromi Arai, Saitama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N / ; H04N / ;
U.S. Cl.
CPC ...
358148 ; 358158 ;
Abstract

A sync detection circuit detects a standard signal which is a signal having V-sync signals with a predetermined repetition period, a non-standard signal which is a signal having V-sync signals with the repetition period other than the predetermined repetition period, and a signal absent condition which occurs when the broadcasting is finished. The sync detection circuit includes a V-sync separator for separating V-sync signals, a counter for counting the predetermined repetition period in relation to each of the V-sync signals and for producing a count-up signal upon counting the predetermined repetition period, and a phase comparator for comparing the phase of the count-up signal with the phase of a V-sync signal and for producing a first level signal, representing the receipt of the standard signal, when the compared signals have the same phase, and a second level signal, representing the receipt of the nonstandard signal, when the compared signals have the different phase. The counter also counts a predetermined time period, which is greater than the predetermined repetition period, in relation to the V-sync signal and for producing a time-up signal upon counting the predetermined time period, and a condition detector for detecting the signal absent condition when no V-sync signal appears before the time-up signal is produced.


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