Electronic circuit with complementary data line

Abstract

In conventional digital-to-analog converters one of a number of multi-emitter transistors is driven by means of the select logics, the emitters of which are connected selectively to a group of data lines. The output circuits connected to the data lines further receive a reference voltage to be able to detect the condition on the data lines. In the analog converter according to the invention each data line is constructed so as to be complementary in which the emitters which in the prior art circuit arrangement are connected to the first group of data lines are coupled in the same manner to a first group of data lines while the remaining emitters are now connected to complementary lines from the second group. The output circuits which are connected to the data lines receive a logic signal of a data line and the complementary logic signal of the associated complementary data line. The result is that the voltage step which is presented to the inputs of the output circuits is twice as large. As a result of this the interference sensitivity is reduced because the margin of the voltage difference to be detected has become twice as large. A further advantage of the converter according to the invention is that a reference voltage for detecting the logic condition on the data lines is superfluous.