Integrated circuit package having a removable test region for testing

Abstract

This invention is an improvement to an integrated circuit package which is of a type that includes a package body with multiple chip attach regions for holding respective integrated circuit chips, signal pads around the chip attach regions, an array of I/O pins on the package body, a first set of conductors in the package body which selectively connect some of the signal pads to the I/O pins, and a second set of conductors which selectively connect some of the signal pads to each other but not to any I/O pins. This improvement enhances the testability of the package at its intermediate state of manufacture, and it comprises: (a) a test region in the package body which is spaced apart from the I/O pins, the chip attach regions, the signal pads, and the first and second sets of conductors; (b) an array of test pins which is attached to the test region of the package body; and (c) a third set of conductors which are disposed in the package body that selectively connect the I/O pins to the signal pads and the first and second sets of conductors such that all conductive paths can be tested for shorts and/or opens via the test pins and the I/O pins. Then, after testing is complete, the test region of the package body is permanently removed from the remainder of the package by a step such as sawing.