Clock resynchronization after a track jump

Abstract

In an information-bearing disk having, along concentric record tracks, pre-written equally spaced tracking pads which may or may not be aligned radially from one track to another, circuitry serves for improving the response time of a disk drive mechanism during a track-jump operation, i.e. when a read/write transducer head moves radially from one record track to any other track. The circuitry includes a phase-locked loop (PLL), coupled to the transducer head and responsive to a pulsed signal corresponding to the frequency at which the tracking pads sweep past the head, and thereby the actual speed of the disk, for producing an adjustable clock signal which controls the rate at which user data is transferred to or from track segments between adjacent tracking pads. A flip flop, in response to a track-jump operation, resynchronizes the clock signal by resetting the phase of the PLL to match the phase of the tracking pads on the new track while the PLL temporarily latches the frequency of the clock signal until the track jump is completed. This improves the overall response time of a data transfer operation by maintaining an appropriate clock signal with minimal loop error in the presence of a difference in phase between the tracking pads on the previous track and the tracking pads on the track to which the transducer head has been moved.