The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 1989

Filed:

Dec. 15, 1986
Applicant:
Inventors:

Takao Funamoto, Hitachi, JP;

Ryoichi Kajiwara, Hitachi, JP;

Mituo Katou, Hitachi, JP;

Takeshi Matsuzaka, Hitachi, JP;

Tomohiko Shida, Hitachi, JP;

Hiroshi Wachi, Hitachi, JP;

Kazuya Takahashi, Katsuta, JP;

Masatoshi Watanabe, Hitachi, JP;

Minoru Yamada, Iruma, JP;

Keiichirou Nakanishi, Kokubunji, JP;

Katuo Sugawara, Hitachi, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
357 82 ; 357 74 ; 357 80 ; 357 81 ;
Abstract

An integrated circuit device comprising a wiring substrate on one surface of which integrated circuit chips are mounted, a power source substrate of a laminated structure provided in contact with the other surface of the wiring substrate and formed by alternately laminating a plurality of feeding conductor layers of a heat conductive metal and a plurality of electrically insulating layers of an electrically insulating material, and bonding together the laminated layers, a means for electrically connecting the wiring substrate and the power source substrate to each other, and a heat radiating means inserted in at least either the feeding conductor layers or the electrically insulating layers and adapted to radiate the heat, which occurs in the power source substrate, to the outside thereof. This integrated circuit device has a power source substrate of a remarkably high heat radiating efficiency, and is suitably used as an integrated circuit device having integrated circuit chips mounted with a high density on a wiring substrate therein.


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