The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 1989

Filed:

Oct. 15, 1987
Applicant:
Inventor:

Dennis N Eddlemon, Tucson, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323313 ; 323315 ;
Abstract

A circuit for providing a constant current and a constant bias voltage is described. The circuit includes two paths coupled between a positive voltage supply +V.sub.S and a negative voltage supply -V.sub.S. Each path inlcudes a Zener diode and a enhancement mode field effect transistor (FET) device (the FET device being coupled in a diode configuration) which are connected in series. Each path of the circuit further includes an FET device and an associated resistor combination, coupled in series with the Zener diode and the diode-coupled FET device. The FET device and the associated resistor function as a current source component. A gate terminal of each FET device of the current source component is coupled across the Zener diode and the diode-coupled FET device of the other circuit path. This cross-coupling between the two paths provides compensation, in addition to that provided by the Zener diode characteristics, for variations in circuit parameters, such as changes in the voltage supplies, thereby permitting a stable bias voltage to be generated.


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