The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 1989

Filed:

Mar. 19, 1987
Applicant:
Inventors:

Masataka Kawamura, Tokyo, JP;

Toshimichi Shimatani, Fuchu, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J / ; H04J / ;
U.S. Cl.
CPC ...
370 84 ; 370112 ;
Abstract

A telecommunications network such as a key telephone system having n terminal devices such as telephone sets which are notionally divided into m groups, for the time division multiplex transmission and reception of m groups of n channels of data, where n is at least six and m is at least three. The invention particularly features a method of, and apparatus for, demultiplexing the multiplex data signal prior to reception by the terminal devices. The multiplex data signal is such that the n channels of data are assigned respectively to a set of n consecutive time slots making up one frame. Under the direction of a control circuit the multiplexed m groups of n channels of data are written onto m groups of n demultiplexing shift registers, respectively, at a relatively high speed. Then each group of shift registers are read at a relatively lower speed during each time interval from the end of the writing of the corresponding group of channels of data of one frame to the beginning of the writing of the same group of channels of data of the next frame. The shift registers serve the dual purpose of demultiplexing and compensating for the difference in the rate of data flow on their input and output sides.


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