The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 14, 1989
Filed:
Sep. 11, 1986
Applicant:
Inventors:
Manfred Arlt, Regensburg, DE;
Joachim Dathe, Munich, DE;
Assignee:
Siemens Aktiengesellschaft, Berlin and Munich, DE;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437227 ; 437205 ; 437226 ; 148D / ;
Abstract
A method for limiting chippage when sawing a semiconductor wafer into individual pieces which involves providing a dielectric layer at least in some portions of the wafer surface. A border of the dielectric layer is applied to the margins of the individual parts which are to be formed on the surface of the semiconductor wafer, being applied under such conditions that the margins exert a tensile stress on the semiconductor surface. This produces a symmetrical tensile stress distribution for limiting the chippage of the semiconductor material in the sawing region on the surface of the semiconductor wafer.