The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 24, 1989
Filed:
May. 19, 1988
William C Moyer, Austin, TX (US);
Michael W Cruess, Austin, TX (US);
William M Keshlear, Richmond, TX (US);
John Zolnowsky, Milpitas, CA (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A paged memory management unit (PMMU) adapted to selectively access a plurality of pointer tables and page tables stored in a memory to translate a selected logical address into a corresponding physical address by first combining a first portion of the logical address and a first table pointer to access a first one of the pointer tables to obtain therefrom a page table pointer to a selected one of the page tables and then combining a second portion of the logical address and the page table pointer to access the selected page table to obtain therefrom the physical address. If desired, an address space selector may be considered as an extension of the logical address. If so, the PMMU may be selectively enabled to initially combine the first table pointer and the address space selector to access a second one of the pointer tables to obtain therefrom a second table pointer and then combine the first portion of the logical address and the second table pointer to access the first one of the pointer tables to obtain therefrom the page table pointer. In the preferred form, the first table pointer is a selected one of several root pointers.