The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 27, 1988
Filed:
Dec. 18, 1987
Applicant:
Inventor:
Hiep van Tran, Carrollton, TX (US);
Assignee:
Texas Instruments Incorporated, Dallas, TX (US);
Primary Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323316 ; 323317 ; 307446 ; 307475 ;
Abstract
A high-speed level shifter converts ECL logic levels to CMOS logic levels for use in an ECL BiCMOS circuit. A CMOS inverter (34) is connected to the output of an emitter coupled pair through a resistor (36). A current reference circuit ensures that the voltage drop across the resistor (36) is such to shift the ECL logic level to the trip point of the CMOS buffer.