The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 1988

Filed:

May. 28, 1987
Applicant:
Inventors:

Stephen J Rawlinson, Sunnyvale, CA (US);

Jongwen Chiou, San Jose, CA (US);

Assignee:

Amdahl Corporation, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
341 89 ; 341104 ; 341105 ;
Abstract

Dedicated convert hardware is disclosed for performing bidirectional conversions of numbers between binary and another base b (illustratively decimal) for use in a data processing system. The dedicated convert hardware comprises a special purpose multiply-and-add unit and a convert register. The output of the multiply-and-add unit is coupled to the input of the convert register, and the output of the convert register is recycled to the inputs of the multiply-and-add unit. The multiply-and-add unit is hardwired to multiply the input by b and concurrently add the value at a separate digit input. Means are also provided for initializing the convert register with zero or with any desired number. The convert hardware is operated to convert a number from radix-b to binary by first initializing the convert register to zero and then iteratively clocking the multiply-and-add unit output into the convert register while presenting to the digit input of the multiply-and-add unit successively high- to low-order digits of the radix-b number. The convert hardware is operated to convert a binary number to radix-b by first initializing the convert register with the fractional part of a product N*b.sup.-m, where N is the binary number and m is an integer greater than zero, and then repetitively clocking the output of the multiply-and-add unit into the convert register while the digit input of the multiply-and-add unit is held at zero. The integer part of each successive multiplication constitutes the successive radix-b digits.


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