The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 20, 1988
Filed:
Feb. 04, 1987
Jeffrey M Speiser, San Diego, CA (US);
Harper J Whitehouse, San Diego, CA (US);
William H McKnight, San Diego, CA (US);
The United States of America as represented by the Secretary of the Navy, Washington, DC (US);
Abstract
Improved dynamic range resolution or accuracy analog to digital conversion ses linear prediction. An open loop or feed-forward architecture passes an analog signal to a coarse or orthodox analog-to-digital converter that provides digital signals representing a most significant part of the output signal and offers them as inputs to a digital linear predictor whose digital output signal is reconverted to analog form and fed to an analog adder. An analog delay device may be used to receive the next analog sample and, after the proper delay (if needed), feed it to the adder where the difference between the analog predicted value and the analog signal is determined and passed to a subsequent coarse or orthodox analog to digital converter. A closed loop or feedback configuration receives the analog input signal data as well as a feedback predicted value in analog form and passes the difference to a coarse or orthodox analog to digital converter. A digital delay of the digital signal may be used to insure that the digital summing of prediction and digitized error signals occurs at the appropriate times. The recirculated predicted signal is converted to analog form (unless predicted via analog means) and subtracted from the analog input signal to provide an error signal output digitized to form low order bits that correspond in time with an output of high order bits generated by a digitized prediction signal. This arrangement improves the dynamic range, accuracy, resolution or number of resolvable signal levels in an analog to digital converter.