Encryption/decryption system

Abstract

An encryption/decryption system for a communication channel increases the number of values for the encryption key variable without increasing the length of a cipher feedback register. This is done by providing a selector to select one from many local and prestored keys for each frame. The transmitting end has a first storage register, a first memory, a first selector, and an encrypting circuit. The encrypting circuit combines a randomized signal with the input signal to form an encrypted signal. As cipher feedback, the first storage register provides bits of the encrypted signal as addresses to the first memory, which outputs corresponding random numbers. The first selector selects from the random number data to form the coding randomized signal fed to the encrypting circuit. The receiving end has a second storage register, a second memory, a second selector, and a digital signal decoding circuit. The second storage register stores bits of a received encrypted signal and outputs them in parallel as addresses. The second memory receives these addresses and outputs corresponding random numbers. To enable decoding, the working and stored contents of the first and second memories are identical. The second selector, operating the same way that the first operates, selects from the identical random number data to form a decoding randomized signal. The decoding circuit combines the received encrypted signal with the decoding randomized signal to reproduce the input digital signal.