The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 1988

Filed:

Apr. 09, 1987
Applicant:
Inventor:

Soichi Ito, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365 63 ; 365 51 ;
Abstract

A semiconductor integrated circuit device comprising a plurality of rows of logic cells, the rows of logic cells being spaced apart from each other to define channel areas therebetween, the logic cells being arranged to form a plurality of function blocks each having a predetermined logic function, and at least one wiring layer overlying the rows of logic cells and the channel areas, the wiring layer comprising a plurality of inter-cell wiring areas extending along the rows of logic cells and including interconnects between desired ones of the logic cells and inter-block wiring areas extending along the channel areas and including interconnects between desired ones of the function blocks. Each of the inter-cell wiring areas comprises wiring sections respectively associated with the function blocks and mostly consisting of wiring sections having widths within a predetermined range.


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