The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 06, 1988
Filed:
May. 16, 1986
Applicant:
Inventors:
John M Birkner, Sunnyvale, CA (US);
Danesh M Tavana, San Jose, CA (US);
Andrew K Chan, Milpitas, CA (US);
Sing Y Wong, Sunnyvale, CA (US);
Assignee:
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; H03K / ;
U.S. Cl.
CPC ...
364716 ; 307465 ;
Abstract
A programmable array logic cell 60 including a sum-of-products array having a single OR gate 70 for providing a sum signal, and including an XOR gate 80 for combining the sum signal with a product signal provided by an AND gate 78 from selected array input and/or feedback signals. The product signal can be the previous state output signal Q for a JK flip flop configuration, or a forced high or low signal for other configurations for programmable output signal polarity.