The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 06, 1988
Filed:
Apr. 16, 1986
Robert D Albin, Santa Rosa, CA (US);
Hewlett-Packard Company, Palo Alto, CA (US);
Abstract
A finline structure comprises a dielectric substrate-mounted circuit disposed within a waveguide having on the substrate integrated distributed capacitance elements at least partially formed by laterally separated metallization layers. Thin-film construction techniques may be employed in construction. In general, the distributed capacitance elements permit the biasing of a plurality of circuit elements in a finline transmission medium. In selected structures, r.f. continuity is effected between traces and metallization layers while maintaining d.c. isolation. Examples are described of circuits which can incorporate an integrated capacitor, including but not limited to detectors, r.f. modulators, r.f. attenuators, amplifiers, and multipliers. According to the invention, a plurality of elements, as well as multiple port elements, may be selectively biased while retaining d.c. isolation and r.f. continuity. Moreover, the versatility of construction allows for higher levels of integration as well as the realization of new topologies previously unattainable. Since the capacitance structure is integrated into the thin film circuit, fewer discrete parts are required and the manufacturing process may be precisely controlled by photolithography.