Level converting bus extender with subsystem selection signal decoding

Abstract

The bus extender circuit is a least replaceable unit which interfaces between intermodule subsystems and the microprocessor controller of the system. The bus extender circuits are structured so that the subsystem modules may be placed in different power zones. As a result, one subsystem may be powered down without affecting the other subsystems connected to the microprocessor's bus. In addition, the bus extender circuit converts from Fairchild Advanced Schottky TTL logic to high-speed CMOS logic and vice versa and allows bus interface gate arrays located in each subsystem to interface between the subsystem logic and the microprocessor. This bus extender circuit design eliminates the need for strapping options or DIP switches for address decoding.