The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 1988
Filed:
Feb. 04, 1988
Applicant:
Inventors:
Dennis P O'Neill, Mountain View, CA (US);
Carl T Nelson, San Jose, CA (US);
Assignee:
Linear Technology Inc., Milpitas, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323314 ; 323315 ; 323901 ;
Abstract
A bias control loop forms a voltage regulator for providing the bias voltage to the collectors of bipolar current source transistors in a linear circuit. The bias loop functions by maintaining equal or related base/emitter voltages on the several transistors. By properly sizing the emitter areas of the transistors, interrelated voltages and transistor biases are provided in the loop. The bias loop works down to less than 1 volt and is stable without a compensation capacitor.