The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 1988

Filed:

Feb. 24, 1987
Applicant:
Inventors:

Kunio Sakuma, Nagano, JP;

Sadasumi Uchiyama, Nagano, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B32B / ; G03C / ;
U.S. Cl.
CPC ...
428209 ; 428220 ; 428543 ; 428901 ; 430311 ; 430313 ; 430318 ; 430319 ; 430394 ; 1566591 ; 1566611 ; 156901 ;
Abstract

A circuit substrate for use in manufacturing integrated circuit devices by the strip-support method in connection with a semiconductor element having conductive pads. The circuit substrate includes a base layer, a conductive circuit layer supported on the base layer for mechanically and electrically coupling to the conductive pads of a semiconductor device. The conductive circuit layer includes a plurality of finger leads with a bump at the end of each finger lead for mechanically and electrically coupling to one of the conductive pads. The coupling surface of each bump has a roughness in a range between 5 and 20 microns. The inherent roughness of the bumps can be augmented by plating the bumps with nickel and gold. A method for forming bumps on the conductive layer of a circuit substrate for attachment of the circuit substrate to conductive pads of a semiconductor element is also provided. The method includes coating a front and a back surface of the conductive layer with photo-resists. Then the photo-resists on both surfaces of the conductive layer are patterned by simultaneous exposure and development. Next, both surfaces of the conductive layer are half-etched. Then, one of the surfaces of the conductive layer is coated with a protective resist and the other surface of the conductive layer is etched. Finally, the photo-resist and protective resist are removed.


Find Patent Forward Citations

Sakuma, Kunio. (1988). Circuit substrate and method for forming bumps on the circuit substrate (U.S. Patent No. 4786545). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4786545

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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