The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 25, 1988

Filed:

Apr. 20, 1987
Applicant:
Inventors:

Daniel E Lenoski, Mountain View, CA (US);

David J Garcia, San Jose, CA (US);

Assignee:

Tandem Computers Incorporated, Cupertino, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
371 25 ; 324 / ;
Abstract

A level sensitive scan design (LSSD) diagnostic apparatus for a data processing component. Each scan unit in a shift register chain comprises a plurality of level sensitive elements, e.g., data latches, which transfer signals from their input terminals to their output terminals in response to a 'Phase B' pulse train. A multiplexer is connected to each data latch for communicating run data to the input terminal of each data latch in a normal mode of operation. In test mode, the multiplexer communicates signals from the output terminal of one data latch to the input terminal of an adjacent data latch, so that the data latch signals are serially communicated through the resulting latch chain. In order to prevent the test data from propagating uncontrollably through the serially connected latches, each multiplexer includes a test latch disposed between the test data input of the multiplexer and the output terminal of the preceding data latch in the chain. The test latch is controlled by a 'Phase A' pulse train signal which is interleaved with the phase B pulse train.


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