Signal transient improvement circuit

Abstract

A transition enhancing circuit includes a tapped delay line which provides successively delayed replicas of the signal to be processed. A multiplexer, responsive to a signal transition, sequentially couples delayed signal from the center tap and taps more distant from the input of the delay line to an output terminal to effectively hold the initial value of the transition for approximately half the transition period. The taps at the input end of the delay line up to and including the center tap are then sequentially coupled to the output terminal to effectively advance, in time, the end value of the signal transition. The signal transition is thereby reduced to a time equivalent to the switching interval between taps.