The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 06, 1988
Filed:
Jul. 22, 1986
Kazunori Furusawa, Kokubunji, JP;
Shinji Nabetani, Tokyo, JP;
Yoshiaki Kamigaki, Tokorozawa, JP;
Masaaki Terasawa, Akishima, JP;
Hitachi, Ltd., Tokyo, JP;
Hitachi VSLI Eng. Corp., Tokyo, JP;
Abstract
Using a comparatively low supply voltage of, e.g., +5V and a minus gate voltage, the voltage difference between the gate of an MNOS transistor and a P-type well region in which a MNOS transistor is formed is relatively changed to execute the writing and erasing of the MNOS transistor. Thus, the potential of an N-type semiconductor substrate can be fixed to a comparatively low potential, e.g., about +5V, so that a P-channel MOSFET formed on the semiconductor substrate operates with an ordinary signal level. Consequently, an EEPROM having peripheral circuits constructed of CMOS circuits can be provided. Accordingly, reduction in the power consumption of the EEPROM can be attained.