Multi-time delay power controller apparatus with time delay turn-on and

Abstract

Multi-time delay power controller apparatus for providing time delayed power-up and power-down for associated electrical equipment, such as computer systems, comprises a power stage configured for connecting to a conventional power outlet, a D.C. power supply connected to an internal D.C. voltage bus, an output stage having a plurality of time delayed outputs and a plurality of time delay turn-on timing stages connected in electrical series with one another between the D.C. bus and ground. Each such stage comprises an R-C circuit and a type 555 integrated circuit which together function as a timer. Included in each stage is a control relay. The energizing coils of the relays in odd numbered stages are connected to ground and of even numbered stages to the D.C. bus. The timing stages are connected so that the timing out of one stage starts the timing of the next-in-sequence stage, the timing of the first-in-sequence stage being started when the apparatus is turned on. The control relays, which provide voltage to the time delayed output stages are energized, in sequence, when each stage times out. Timed delay turn-off means are provided for sequentially removing the voltages to the outputs in the reverse order in which voltage is applied by operation of the control relays. The time delay turn-off means include relays through which the time delay turn-on relays are energized and which cause deenergizing of the control relays in the turn-off sequence.